Design & Reuse
Catalog of SIP Cores
System on Chip design resources
arrow Arithmetic & Mathematic (46)
arrow Embedded Memories (996)
arrow I/O Library (1032)
arrow PLL (1746)
arrow Standard cell (756)
1032 IP
151
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
152
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
153
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
154
1.0
A 2Gbps LVDS Transceiver in TSMC 28nm
This 1.8V LVDS transceiver, designed for TSMCs 28nm process, delivers high-speed, low-power differential signaling with superior signal integrity. Eng...
155
1.0
A 2Gbps SLVS Transceiver in TSMC 28nm
This 1.8V SLVS transceiver is a high-performance, low-power I/O solution optimized for TSMCs 28nm process. Designed with 1.8V thick oxide devices and ...
156
1.0
A GlobalFoundries 28nm ESD Library
This ESD library is a silicon-proven set of discrete, pad-independent ESD clamps for GlobalFoundries 28nm technology. The library is designed to provi...
157
1.0
1.8V to 3.3V GPIO and 3.3V LVDS in Skywater S90-LN
This I/O Library is a robust, mixed-signal I/O platform developed for the SkyWater 90 nm (S90-LN) process, designed to support reliable SoC integratio...
158
1.0
I/O:Ultra Small Size Dup-Pad total solution
...
159
1.0
I/O:Ultra Small Size Dup-Pad total solution
...
160
1.0
800MHz LVDS Cell Set for 180nm
The OT3910 is a set of cells for implementing 800Mb DDR (400MHz) LVDS IO in 180n CMOS processes. Includes transmitter and receiver IO's. Also core ...
161
1.0
32:1 serializer followed by sub-LVDS drivers
The CCP2 transmitter consists of a 32:1 serializer followed by LVDS drivers for transmitting clock (or strobe) and data. The LVDS drivers operate in s...
162
1.0
650M LVDS transmitter, 5 channel
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...
163
1.0
UA11: 200Mbps 1.2V SLVS transceiver, UMC 110nm
A compact 1.2V SLVS transceiver in UMC 110nm for high-speed, low-power links. It provides JESD8-13-compliant TX and RX paths up to 200Mbps with strong...
164
1.0
TA18: 1.5V - 3.3V GPIO Library with tri-state driver & 7V OTP, GlobalFoundries 180nm BCD Lite
A silicon-proven wirebond GPIO library in GlobalFoundries 180nm BCD Lite — a specialty I/O in the SoundWire family — with a 1.5V–3.3V multi-voltage GP...
165
1.0
JA65: High-speed 3.3V GPIO/LVDS TX/ODIO Library with 8kV ESD & RF Cell, TPSCo 65nm
A silicon-proven I/O library for TPSCo 65nm CMOS with 1.2V core / 3.3V I/O on a 1P7M1L1F stack with aluminum RDL. It includes GPIO, 5V-tolerant I2C-co...
166
1.0
PAD - SMIC 110nm generic
...
167
1.0
Samsung 28nm FDSOI 1.8v/1.0v LVDS Transmitter
...
168
1.0
Samsung 28nm FDSOI 1.8v/1.0v sub-LVDS Receiver
...
169
1.0
IBM 65nm LVDS Receiver
The LVDS Receiver converts up to 10 pairs of LVDS data streams into 70-bit of CMOS data and then feeds the data to the logic core that can support Sin...
170
1.0
IBM 65nm LVDS Transmitter
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...
171
1.0
IBM 65nm LVDS Transmitter
The LVDS transmitter converts 28-bit data into 4-pair LVDS data stream. A phase-locked transmit clock is transmitted in parallel with the data stream ...
172
1.0
IBM 65nm Mini-LVDS Transmitter
The Mini-LVDS transmitter converts up to 64-bit CMOS data into 16-pairs of Mini-LVDS data stream that can support Single-Link transmission with up to ...
173
1.0
ICRD 0.5um IO library
ICRD 0.5um process 5V Generic IO library...
174
1.0
MCU PAD - SMIC 55nm Eflash
...
175
1.0
MCU PAD - SMIC 55nm Eflash
...
176
1.0
MCU PAD - SMIC 55nm Eflash
...
177
1.0
WD28 / SC28: sub 80fF ESD Macro for multi-gigabit SerDes, TSMC 28nm
A silicon-proven, ultra-low-capacitance ESD macro in TSMC 28nm for multi-gigabit SerDes, available in wirebond (WD28) and flip-chip (SC28) variants. I...
178
1.0
HDMI, LVDS, RF and Analog Pads Library in 45nm / 40nm in TSMC 45/40nm
A 1.0V to 5V Analog IO Library that includes an HDMI, LVDS, and Analog/RF Low Capacitance pad set in 45nm/40nm HPM processes. This library is a col...
179
1.0
TE55: 0.9V/2.5V SoundWire audio I/O Library, TSMC 55nm LP
A silicon-proven 0.9V/2.5V in-line I/O library in TSMC 55nm LP, purpose-built as a SoundWire interface for high-performance, low-power audio. It provi...
180
1.0
VeriSilicon CHRT 0.13um 1.2V/2.5V DUPIO_01 Library
VeriSilicon CHRT 0.13um 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Chartered Semiconductor Manufacturing (CHRT) 0.13um L...
181
1.0
VeriSilicon CHRT 0.13um 1.2V/3.3V DUPIO_01 Library
VeriSilicon CHRT 0.13um 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Chartered Semiconductor Manufacturing (CHRT) 0.13um L...
182
1.0
VeriSilicon GSMC 0.18um 1.8v/3v/5v Mult IO for SIMcard
VeriSilicon GSMC 0.18um 1.8V/3.3V Multiple I/O Cell (08) Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporati...
183
1.0
VeriSilicon GSMC 0.18um (LP) 1.8V/3.3V Multiple I/O
VeriSilicon GSMC 0.18um (LP) 1.8V/3.3V Multiple I/O Cell (01E) Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Cor...
184
1.0
VeriSilicon GSMC 0.18um 1.8V/3.3V Multiple DUP I/O
VeriSilicon GSMC 0.18μm 1.8V/3.3V Multiple DUP I/O Cell (01E) Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corp...
185
1.0
VeriSilicon GSMC 0.18um 1.8V/3.3V Multiple I/O (05) Library
VeriSilicon GSMC 0.18um 1.8V/3.3V Multiple I/O Cell (05) Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporati...
186
1.0
VeriSilicon IBM 65nm 1.0V/2.5V VPPIO_01 IO Library
VeriSilicon IBM 65nm 1.0V/2.5V VPPIO_01 IO library developed by VeriSilicon is optimized for IBM 65nm 10sf 1.0/2.5V process. This library provides 6.5...
187
1.0
VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...
188
1.0
VeriSilicon SMIC 0.11μm 1.2V/3.3V DUPIO_01 Library
VeriSilicon SMIC 0.11μm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation...
189
1.0
VeriSilicon SMIC 0.13um 1.2V/2.5V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.13um 1.2V/2.5V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...
190
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple DUP I/O Cell
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple DUP I/O Cell (05) Library developed by VeriSilicon supports power/ground pads, bi-directional I/O, IU (bi-d...
191
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O 01C Library
VeriSilicon SMIC 0.13μm 3.3V Multiple I/O 01C Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpora...
192
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell (05) Library developed by VeriSilicon supports power/ground pads, bi-directional I/O, bidirectiona...
193
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell (06) Library developed by VeriSilicon supports power/ground pads, bi-directional I/O, and input bu...
194
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_01 I/O Cell Library
VeriSilicon SMIC 0.13μm SSTL2/SSTL3 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpora...
195
1.0
VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUPIO_01 Library
VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...
196
1.0
VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.13um 1.2V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...
197
1.0
VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library
VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...
198
1.0
VeriSilicon SMIC 0.16um 1.8V/3.3V VPPIO_01 IO Library
VeriSilicon SMIC 0.16um 1.8V/3.3V VPPIO_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation ...
199
1.0
VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...
200
1.0
VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V VPPIO_DUP_01 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V VPPIO_DUP_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporat...